|
DVI
PanelLinK LD-S372 (AGP)
DVI PanelLinK LD-S272 (PCI)
DVI
DRV-200 (PanelLink Receiver Board)
ARV-400 (Analog & PanelLink Controller
Board)
DVI LPC-8000 (PanelLink Embedded CPU
Board)
Spectrah
Dynamics follows the new industry display
specification DVI (Digital Visual Interface)
to develop its new produt lines including
digital LCD VGA card LD-S372 & LD-S272,
PanelLnk receiver board DRV-200, Analog
& PanelLink Controller board ARV-400,
and Embedded CPU board LPC-8000. With
Spectrah DVI product lines, you can experience
high quality digital LCD displays, complete
LCD panel connection and BIOS support,
and most cost efficient solution. |
|
| |

|
Q:
What is DVI and DDWG? |
A: |
The DVI is the
abbreviation of " Digital Visual
Interface", developed by DDWG. The
DDWG is the abbreviation of " Digital
Display Working Group" which was
organized by Intel Corporation, Silicon
Image, Inc., Compaq Computer Corp., Fujitsu
Limited, Hewlette-Packard Company, International
Business Machines Corp., and NEC Corporation. |
|
Q:
What sepcifications and benefits does
DVI provide? |
A: |
The DVI is primarily
focused at providing a connection between
a computer and its display device through
a high-speed digital interconnection T.M.D.S.
link. The DVI ensures all content transferred
over this interface remains in the lossless
digital domain from creation to consumption,
which is much better than the standard
VGA connector. In summary. the DVI interface
enables: |
|
1. Content
to remain in the lossless digital domain
from creation to consumption
2. Display technology independence
3. Plug and play through hot plug detection,
EDID and DDC2B
4. Digital and Analog support in a single
connector. |
|
Q:
What is the T.M.D.S. technology? |
A: |
The DVI uses Transition
Minimized Differential Signaling (T.M.D.S.)
technology for the base electrical interconnection,
which was developed by Silicon Image,
Inc., the member of DDWG. The T.M.D.S.
link is used to send graphics data to
the monitor. The transition minimization
is achieved by implementing an advanced
encoding algorithm that converts 8-bits
of data into a 10-bit transition minimixed,
DC balanced character. This interface
specification allows for two T.M.D.S.
links enabling large pixel format digital
display devices. One or two T.M.D.S. links
are available depending on the pixel format
and timings desired. The two T.M.D.S.
links share the same clock allowing the
bandwidth to be evenly divided between
the two links.
The transmitter
incorporates an advanced coding algorithm
to enable T.M.D.S. signaling for reduced
EMI across copper cables and DC-balancing
for data transmission over fiber optic
cables.In addition, the advanced coding
algorithm enables robust clock recovery
at the receiver to achieve high skew
tolerance for driving longer cable lengths
as well as shorter low cost cables. |
|
| |